View source for AMD K6

==Features==
* Seven execution units specialized in parallelized instructions<ref>{{cite web |title=AMD-K6 Processor Data Sheet |url=https://www.ardent-tool.com/CPU/docs/AMD/K6/20695.pdf |publisher=AMD |date=March 1998}}</ref>
* x86 decoders that translate x86 assembly to RISC86 instructions<ref>{{Cite web |title=The legend of "x86 CPUs decode instructions into RISC form internally" - Fanael's random ruminations |url=https://fanael.github.io/is-x86-risc-internally.html |access-date=2023-06-01 |website=fanael.github.io}}</ref> {{Failed verification|date=November 2023}}
* IEEE 1149.1 [[boundary scan]]
* [[Speculative execution]] optimization
* [[Out-of-order execution]]
* [[Register renaming]]