Binary-coded decimal: Difference between revisions

{{redirect|BCD code|BCD character sets|BCD (character encoding)||}}

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[[File:Binary clock.svg|250px|thumbnail|right|A [[binary clock]] might use [[Light-emitting diode|LED]]s to express binary values. In this clock, each column of LEDs shows a binary-coded decimal numeral of the traditional [[sexagesimal]] time.]]

In [[computing]] and [[electronics|electronic]] systems, '''binary-coded decimal''' ('''BCD''') is a class of [[Binary number|binary]] encodings of [[decimal]] numbers where each [[numerical digit|digit]] is represented by a fixed number of [[bit]]s, usually four or eight. Sometimes, special bit patterns are used for a [[Sign (mathematics)|sign]] or other indications (e.g. error or overflow).

{{anchor|Pseudo-tetrade}}The ten states representing a BCD digit are sometimes called ''[[tetrade (computing)|tetrade]]s''<ref name="Klar_1970"/><ref name="Klar_1989"/> (the [[nibble]] typically needed to hold them is also known as a tetrade) while the unused, [[don't care]]-states are named ''pseudo-tetrad(e)s''{{small|{{bracket|[[:de:Pseudotetrade|de]]}}}},<ref name="Schneider_1986"/><ref name="Tafel_1971"/><ref name="Steinbuch-Weber-Heinemann_1974"/><ref name="Tietze-Schenk_2013"/><ref name="Kowalski_1070"/> ''pseudo-decimals'',<ref name="Klar_1989"/> or ''pseudo-decimal digits''.<ref name="Ferretti_2013"/><ref name="Speiser_1965"/><ref group="nb" name="Pseudo-tetrades"/>

BCD ''per se'' is not as widely used as in the past, and is unavailable or limited in newer instruction sets (e.g., [[ARM architecture family|ARM]]; [[x86]] in [[long mode]]). However, decimal [[Fixed-point arithmetic|fixed-point]] and decimal [[floating-point]] formats are still important and continue to be used in financial, commercial, and industrial computing, where the subtle conversion and fractional [[round-off error|rounding errors]] that are inherent in binary floating point formats cannot be tolerated.<ref name="Cowlishaw_GDA" />

BCD takes advantage of the fact that any one decimal numeral can be represented by a four-bit pattern. An obvious way of encoding digits is ''Natural BCD'' (NBCD), where each decimal digit is represented by its corresponding four-bit binary value, as shown in the following table. This is also called "8421" encoding.

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! style="background:#e0e0e0;"| &nbsp;<br />Digit

! style="background:#e0e0e0;"| BCD<br />8{{thinsp}}4{{thinsp}}2{{thinsp}}1

! style="background:#e0e0e0;"| [[Aiken-Code]] or BCD<br />2{{thinsp}}4{{thinsp}}2{{thinsp}}1

! style="background:#e0e0e0;"| BCD<br />8{{thinsp}}4{{thinsp}}−2{{thinsp}}−1

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For example, a 4-byte (32-bit) word can hold seven decimal digits plus a sign and can represent values ranging from ±9,999,999. Thus the number −1,234,567 is 7 digits wide and is encoded as:

[[Ten's complement]] representations for negative numbers offer an alternative approach to encoding the sign of packed (and other) BCD numbers. In this case, positive numbers always have a most significant digit between 0 and 4 (inclusive), while negative numbers are represented by the 10's complement of the corresponding positive number.

===Fixed-point packed decimal===

[[Fixed-point arithmetic|Fixed-point]] decimal numbers are supported by some programming languages (such as COBOL and PL/I). These languages allow the programmer to specify an implicit decimal point in front of one of the digits.

  12 34 56 7C

  ''12 34.56 7+''

The decimal point is not actually stored in memory, as the packed BCD storage format does not provide for it. Its location is simply known to the compiler, and the generated code acts accordingly for the various arithmetic operations.

For signed zoned decimal values, the rightmost (least significant) zone nibble holds the sign digit, which is the same set of values that are used for signed packed decimal numbers (see above). Thus a zoned decimal value encoded as the hex bytes F1 F2 D3 represents the signed decimal value −123:

  1  2 −3

<!-- Note that this table should also include codes A0-A9, B0-B9, and E0-E9 for completeness. -->

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(*) ''Note: These characters vary depending on the local character [[code page]] setting.''

Some languages (such as COBOL and PL/I) directly support fixed-point zoned decimal values, assigning an implicit decimal point at some location between the decimal digits of a number.

The two nibbles of the result, 0001 and 0111, correspond to the digits "1" and "7". This yields "17" in BCD, which is the correct result.

=== Subtraction ===

  + 0000 0000 0110 0110

   0    0    6    6

Thus the result of the subtraction is 1001 1001 0010 0101 (−925). To confirm the result, note that the first digit is 9, which means negative. This seems to be correct since 357 − 432 should result in a negative number. The remaining nibbles are BCD, so 1001 0010 0101 is 925. The ten's complement of 925 is 1000 − 925 = 75, so the calculated answer is −75.

If there are a different number of nibbles being added together (such as 1053 − 2), the number with the fewer digits must first be prefixed with zeros before taking the ten's complement or subtracting. So, with 1053 − 2, 2 would have to first be represented as 0002 in BCD, and the ten's complement of 0002 would have to be calculated.

IBM used the terms ''[[Binary-Coded Decimal Interchange Code]]'' (BCDIC, sometimes just called BCD), for 6-bit ''[[alphanumeric]]'' codes that represented numbers, upper-case letters and special characters. Some variation of BCDIC ''alphamerics'' is used in most early IBM computers, including the [[IBM 1620]] (introduced in 1959), [[IBM 1400 series]], and non-[[IBM 700/7000 series#Decimal architecture (7070/7072/7074)|decimal architecture]] members of the [[IBM 700/7000 series]].

The IBM 1400 series are character-addressable machines, each location being six bits labeled ''B, A, 8, 4, 2'' and ''1,'' plus an odd parity check bit (''C'') and a word mark bit (''M''). For encoding digits ''1'' through ''9'', ''B'' and ''A'' are zero and the digit value represented by standard 4-bit BCD in bits ''8'' through ''1''. For most other characters bits ''B'' and ''A'' are derived simply from the "12", "11", and "0" "zone punches" in the [[punched card]] character code, and bits ''8'' through ''1'' from the ''1'' through ''9'' punches. A "12 zone" punch set both ''B'' and ''A'', an "11 zone" set ''B'', and a "0 zone" (a 0 punch combined with any others) set ''A''. Thus the letter '''A''', which is ''(12,1)'' in the punched card format, is encoded ''(B,A,1)''. The currency symbol '''$''', ''(11,8,3)'' in the punched card, was encoded in memory as ''(B,8,2,1)''. This allows the circuitry to convert between the punched card format and the internal storage format to be very simple with only a few special cases. One important special case is digit ''0'', represented by a lone ''0'' punch in the card, and ''(8,2)'' in core memory.<ref name="Van1401"/>

In the decimal architecture [[IBM 7070]], [[IBM 7072]], and [[IBM 7074]] ''alphamerics'' are encoded using digit pairs (using [[two-out-of-five code]] in the digits, '''not''' BCD) of the 10-digit word, with the "zone" in the left digit and the "digit" in the right digit. Input/output translation hardware converted between the internal digit pairs and the external standard 6-bit BCD codes.

</syntaxhighlight>

BCD is common in electronic systems where a numeric value is to be displayed, especially in systems consisting solely of digital logic, and not containing a microprocessor. By employing BCD, the manipulation of numerical data for display can be greatly simplified by treating each digit as a separate single sub-circuit.

The same argument applies when hardware of this type uses an embedded microcontroller or other small processor. Often, representing numbers internally in BCD format results in smaller code, since a conversion from or to binary representation can be expensive on such limited processors. For these applications, some small processors feature dedicated arithmetic modes, which assist when writing routines that manipulate BCD quantities.<ref name="IEEE_CORDIC"/><ref name="BCS_CORDIC"/>

<!-- not at all clear why this needs to be here at all, shouldn't the article just describe BCD? (mfc)-->

<!--as an alternative number system for computing and electronics imo a comparison to the standard one is justified (plugwash)-->

* Standard BCD requires four bits per digit, roughly 20% more space than a binary encoding (the ratio of 4 bits to log₂10 bits is 1.204). When packed so that three digits are encoded in ten bits, the storage overhead is greatly reduced, at the expense of an encoding that is unaligned with the 8-bit byte boundaries common on existing hardware, resulting in slower implementations on these systems.<!-- Could add: encoding or decoding is trivial in software using a table lookup, and fast using direct logic otherwise. In hardware, it requires no more than three gate delays. -->

Various BCD implementations exist that employ other representations for numbers. [[Programmable calculator]]s manufactured by [[Texas Instruments]], [[Hewlett-Packard]], and others typically employ a [[floating-point]] BCD format, typically with two or three digits for the (decimal) exponent. The extra bits of the sign digit may be used to indicate special numeric values, such as [[infinity]], [[arithmetic underflow|underflow]]/[[arithmetic overflow|overflow]], and [[Defined and undefined|error]] (a blinking display).

Signed decimal values may be represented in several ways. The [[COBOL]] programming language, for example, supports five zoned decimal formats, with each one encoding the numeric sign in a different way:

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[[3GPP]] developed '''TBCD''',<ref name="3GPP_2013_TS29002"/> an expansion to BCD where the remaining (unused) bit combinations are used to add specific [[telephony]] symbols,<ref name="ETSI_SPS"/><ref name="OpenSS_XMAP"/> similar to those in [[DTMF|telephone keypad]] design.

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This format is used in modern [[mobile telephony]] to send dialed numbers, as well as [[Mobile country code|operator ID]] (the MCC/MNC tuple), [[International Mobile Equipment Identity|IMEI]], [[International mobile subscriber identity|IMSI]] (SUPI), et.c.<ref>{{cite web|url=https://www.etsi.org/deliver/etsi_ts/124500_124599/124501/16.10.00_60/ts_124501v161000p.pdf|title=Non-Access-Stratum (NAS) protocol for 5G System (5GS); Stage 3. (3GPP TS 24.501 version 16.10.0 Release 16) TS 24.501 release 16.10.0|publisher=[[ETSI]] and [[3GPP]]|access-date=February 26, 2022|archive-date=February 17, 2022|archive-url=https://web.archive.org/web/20220217231615/https://www.etsi.org/deliver/etsi_ts/124500_124599/124501/16.10.00_60/ts_124501v161000p.pdf|url-status=live}} (TS 24.501)</ref><ref>{{cite web|url=https://www.etsi.org/deliver/etsi_ts/123000_123099/123003/16.08.00_60/ts_123003v160800p.pdf|title=Digital cellular telecommunications system (Phase 2+) (GSM); Universal Mobile Telecommunications System (UMTS); LTE; 5G; Numbering, addressing and identification (3GPP TS 23.003 version 16.8.0 Release 16)|publisher=[[ETSI]] and [[3GPP]]|access-date=February 26, 2022|archive-date=February 26, 2022|archive-url=https://web.archive.org/web/20220226144220/https://www.etsi.org/deliver/etsi_ts/123000_123099/123003/16.08.00_60/ts_123003v160800p.pdf|url-status=live}} (TS 23.003)</ref>

If errors in representation and computation are more important than the speed of conversion to and from display, a scaled binary representation may be used, which stores a decimal number as a binary-encoded integer and a binary-encoded signed decimal exponent. For example, 0.2 can be represented as 2{{e|-1}}.

The [[Hertz encoding|Hertz]] and [[Chen–Ho encoding]]s provide Boolean transformations for converting groups of three BCD-encoded digits to and from 10-bit values<ref group="nb" name="Pseudo-tetrades"/> that can be efficiently encoded in hardware with only 2 or 3 gate delays. [[Densely packed decimal]] (DPD) is a similar scheme<ref group="nb" name="Pseudo-tetrades"/> that is used for most of the [[significand]], except the lead digit, for one of the two alternative decimal encodings specified in the [[IEEE 754-2008]] floating-point standard.

Early models of the [[PlayStation 3]] store the date and time in BCD. This led to a worldwide outage of the console on 1 March 2010. The last two digits of the year stored as BCD [[time formatting and storage bugs|were misinterpreted]] as 16 causing an error in the unit's date, rendering most functions inoperable. This has been referred to as the [[Year 2010 problem]].

In the 1972 case ''[[Gottschalk v. Benson]]'', the [[U.S. Supreme Court]] overturned a [[United States Court of Customs and Patent Appeals|lower court]]'s decision that had allowed a [[patent]] for converting BCD-encoded numbers to binary on a computer.

The decision noted that a patent "would wholly pre-empt the mathematical formula and in practical effect would be a patent on the [[algorithm]] itself".<ref name="Gottschalk-Benson_1972" /> This was a landmark judgement that determined the [[Software patents under United States patent law|patentability of software and algorithms]].

* [[Bi-quinary coded decimal]]

* [[Binary-coded ternary]] (BCT)

* [[Year 2000 problem]]

{{reflist|group="nb"|refs=

<ref group="nb" name="Pseudo-tetrades">In a standard packed 4-bit representation, there are 16 states (four bits for each digit) with 10 [[tetrade (computing)|tetrade]]s and 6 [[pseudo-tetrade]]s, whereas in more densely packed schemes such as [[Hertz encoding|Hertz]], [[Chen–Ho encoding|Chen–Ho]] or [[densely packed decimal|DPD]] encodings there are fewer—e.g., only 24 [[unused state (logic)|unused state]]s in 1024 states (10 bits for three digits).</ref>

<ref group="nb" name="Packed_chars">In a similar fashion, multiple characters were often packed into machine [[word (computer architecture)|word]]s on [[minicomputer]]s, see [[SQUOZE#Identifier name character encoding|IBM SQUOZE]] and [[DEC RADIX 50]].</ref>

<ref group="nb" name="Non-BCD">Code states (shown in black) outside the decimal range 0–9 indicate additional states of the non-BCD variant of the code. In the BCD code variant discussed here, they are pseudo-tetrades.</ref>

<ref group="nb" name="Petherick_RAE">The [[Petherick code]] is also known as [[Royal Aircraft Establishment]] (RAE) code.</ref>

<ref group="nb" name="O'Brien-I_WRD">The [[O'Brien code type I]] is also known as [[Hilger & Watts|Watts]] code or Watts reflected decimal (WRD) code.</ref>

}}

<ref name="Gottschalk-Benson_1972">{{ussc |name=Gottschalk v. Benson |volume=409 |page=63 |pin=72 |date=1972}}.</ref>

<ref name="Intel_IA32">{{cite web |author=Intel |title=ia32 architecture manual |url=http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developers-manual.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developers-manual.pdf |archive-date=2022-10-09 |url-status=live |publisher=[[Intel]] |access-date=2015-07-01}}</ref>

<ref name="Dewar-Smosna_1990">{{cite book |title=Microprocessors - A Programmer's View |author-first1=Robert Berriedale Keith |author-last1=Dewar |author-link1=Robert Berriedale Keith Dewar |author-first2=Matthew |author-last2=Smosna |date=1990 |edition=1 |publisher=[[McGraw-Hill Publishing Company]] |location=[[Courant Institute]], [[New York University]], New York, USA |isbn=0-07-016638-2 |lccn=89-77320 |page=14}} (xviii+462 pages)</ref>

<ref name="Savard_2018_Decimal">{{cite web |title=Decimal Representations |author-first=John J. G. |author-last=Savard |date=2018 |orig-date=2006 |work=quadibloc |url=http://www.quadibloc.com/comp/cp0203.htm |access-date=2018-07-16 |url-status=live |archive-url=https://web.archive.org/web/20180716101321/http://www.quadibloc.com/comp/cp0203.htm |archive-date=2018-07-16}}</ref>

<ref name="Kautz_1954">{{cite conference |title=Optimized Data Encoding for Digital Computers |chapter=IV. Examples A. Binary Codes for Decimals, n = 4 |author-last=Kautz |author-first=William H. |author-link=William H. Kautz |conference=Convention Record of the I.R.E., 1954 National Convention, Part 4 - Electronic Computers and Information Theory |publisher=[[I.R.E.]] |series=Session 19: Information Theory III - Speed and Computation |date=June 1954 |location=Stanford Research Institute, Stanford, California, USA |pages=47–57 [49, 51–52, 57] |url=https://worldradiohistory.com/Archive-IRE/50s/IRE-1954-Part-4-Electronic-Computers-&-Information%20pdf |access-date=2020-07-03 |url-status=live |archive-url=https://web.archive.org/web/20200703180632/https://worldradiohistory.com/Archive-IRE/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information%20pdf |archive-date=2020-07-03 |quote-page=52 |quote=[…] The last column [of Table II], labeled "Best," gives the maximum fraction possible with any code—namely 0.60—half again better than any conventional code. This extremal is reached with the ten heavily-marked vertices of the graph of [[#Kautz|Fig. 4]] for n = 4, or, in fact, with any set of ten code combinations which include all eight with an even (or all eight with an odd) number of "1's." The second and third rows of Table II list the average and peak decimal change per undetected single binary error, and have been derived using the equations of Sec. II for Δ₁ and δ₁. The confusion index for decimals using the criterion of "decimal change," is taken to be c_ij = {{!}}i − j{{!}} &nbsp; i,j = 0, 1, … 9. Again, the "Best" arrangement possible (the same for average and peak), one of which is shown in Fig. 4, is substantially better than the conventional codes. […] Fig. 4 [[#Kautz|Minimum-confusion code for decimals]]. […] δ₁=2 &nbsp; Δ₁=15 […]}} [https://web.archive.org/web/20200703173707/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0049.pdf] [https://web.archive.org/web/20200703175038/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0050.pdf] [https://web.archive.org/web/20200703175214/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0051.pdf] [https://web.archive.org/web/20200703175243/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0052.pdf] [https://web.archive.org/web/20200703175313/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0053.pdf] [https://web.archive.org/web/20200703175344/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0054.pdf] [https://web.archive.org/web/20200703175425/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0055.pdf] [https://web.archive.org/web/20200703175459/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0056.pdf] [https://web.archive.org/web/20200703175529/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0057.pdf] [https://web.archive.org/web/20200703175606/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0058.pdf] [https://web.archive.org/web/20200703175641/https://worldradiohistory.com/hd2/IDX-Site-Technical/Engineering-General/Archive-IRE-IDX/IDX/50s/IRE-1954-Part-4-Electronic-Computers-%26-Information-OCR-Page-0059.pdf] (11 pages) (NB. Besides the combinatorial set of 4-bit BCD "minimum-confusion codes for decimals", of which the author illustrates only one explicitly (here reproduced as [[#Kautz|code I]]) in form of a 4-bit graph, the author also shows a 16-state 4-bit "binary code for analog data" in form of a code table, which, however, is not discussed here. The [[#Kautz II|code II]] shown here is a modification of code I discussed by {{citeref|Berger|1962|Berger|style=plain}}.)</ref>

<ref name="Stopper_1960">{{cite journal |title=Ermittlung des Codes und der logischen Schaltung einer Zähldekade |language=de |author-first=Herbert |author-last=Stopper |editor-first=Wilhelm Tolmé |editor-last=Runge |editor-link=Wilhelm Tolmé Runge |date=March 1960 |journal=Telefunken-Zeitung (TZ) - Technisch-Wissenschaftliche Mitteilungen der Telefunken GMBH |volume=33 |issue=127 |publisher=[[Telefunken]] |publication-place=Berlin, Germany |location=Litzelstetten, Germany |pages=13–19}} (7 pages<!-- of total pages 1–80 -->)</ref>

<ref name="Borucki-Dittmann_1971">{{cite book |title=Digitale Meßtechnik: Eine Einführung |chapter=2.3 Gebräuchliche Codes in der digitalen Meßtechnik |language=de |author-first1=Lorenz |author-last1=Borucki |author-first2=Joachim |author-last2=Dittmann |date=1971 |orig-date=July 1970, 1966, Autumn 1965 |publisher=[[Springer-Verlag]] |publication-place=Berlin / Heidelberg, Germany |location=Krefeld / Karlsruhe, Germany |edition=2 |lccn=75-131547 |isbn=3-540-05058-2<!-- this is the ISBN printed in the book --> |id={{ISBN|978-3-642-80561-5}}<!-- this is for reprints of the 2nd edition --> |doi=10.1007/978-3-642-80560-8 |pages=10–23 [12–14]}} (viii+252 pages) [https://books.google.com/books?id=NwyCBwAAQBAJ&pg=PA15 1st edition]</ref>

<ref name="Gray_1947">{{cite book |author-first=Frank |author-last=Gray |author-link=Frank Gray (researcher) |title=Pulse Code Communication |date=1953-03-17<!-- gdate --> |orig-date=1947-11-13<!-- fdate --> |publisher=[[Bell Telephone Laboratories, Incorporated]] |location=New York, USA |id={{US patent|2632058}}. Serial No. 785697 |url=https://patentimages.storage.googleapis.com/a3/d7/f2/0343f5f2c0cf50/US2632058.pdf |access-date=2020-08-05 |url-status=live |archive-url=https://web.archive.org/web/20200805094312/https://patentimages.storage.googleapis.com/a3/d7/f2/0343f5f2c0cf50/US2632058.pdf |archive-date=2020-08-05}} (13 pages)</ref>

<ref name="Glixon_1957">{{cite journal |date=March 1957 |title=Can You Take Advantage of the Cyclic Binary-Decimal Code? |author-first=Harry Robert |author-last=Glixon |journal=[[Control Engineering (magazine)|Control Engineering]] |issn=0010-8049 |publisher=[[Technical Publishing Company]], a division of Dun-Donnelley Publishing Corporation, [[Dun & Bradstreet Corp.]] |volume=4 |number=3 |pages=<!-- 3, -->87–91 |url=https://books.google.com/books?id=-_5IAQAAIAAJ}}<!-- https://web.archive.org/web/20180115014809/https://donmooreswartales.com/2010/05/12/harry-glixon/ https://books.google.com/books?id=-_5IAQAAIAAJ&focus=searchwithinvolume&q=cyclic+binary+code --> (5 pages)</ref>

<ref name="EHub_2015">{{cite web |title=Different Types of Binary Codes |at=Section 2.4 5211 Code |date=2019-05-01 |orig-date=2015-01-28 |work=Electronic Hub |url=https://www.electronicshub.org/disclaimer/ |access-date=2020-08-04 |url-status=live |archive-url=https://web.archive.org/web/20200518203953/https://www.electronicshub.org/disclaimer/ |archive-date=2020-05-18}}</ref>

<ref name="Paul_1995">{{cite web |author-first=Matthias R. |author-last=Paul |title=Unterbrechungsfreier Schleifencode |language=de |trans-title=Continuous loop code |version=1.02 |url=http://www.uni-bonn.de/~uzs180/download/mpbcd102.zip |date=1995-08-10 |orig-date=1994 |access-date=2008-02-11}}{{cbignore}} (NB. The author called this code {{lang|de|Schleifencode}} (English: "loop code"). It differs from [[Gray BCD code]] only in the encoding of state 0 to make it a cyclic [[unit-distance code]] for full-circle rotatory [[slip ring]] applications. Avoiding the all-zero code pattern allows for loop self-testing and to use the data lines for uninterrupted power distribution.)</ref>

<ref name="Petherick_1953">{{cite book |author-first=Edward John |author-last=Petherick |title=A Cyclic Progressive Binary-coded-decimal System of Representing Numbers |date=October 1953 |type=Technical Note MS15 |publisher=[[Royal Aircraft Establishment]] (RAE) |location=Farnborough, UK}} (4 pages) (NB. Sometimes referred to as ''A Cyclic-Coded Binary-Coded-Decimal System of Representing Numbers''.)</ref>

<ref name="Petherick-Hopkins_1958">{{cite book |author-first1=Edward John |author-last1=Petherick |author-first2=A. J. |author-last2=Hopkins |title=Some Recently Developed Digital Devices for Encoding the Rotations of Shafts |date=1958 |type=Technical Note MS21 |publisher=[[Royal Aircraft Establishment]] (RAE) |location=Farnborough, UK}}</ref>

<ref name="Susskind_1958">{{cite book |title=Notes on Analog-Digital Conversion Techniques |chapter=III.F. Unit-Distance Codes / VI.E.2. Reflected Binary Codes |editor-first=Alfred Kriss |editor-last=Susskind<!-- born 1923-10-04, Coblenz (Göda), Germany, died 1988-12-10 Bethesda, Maryland, USA --> |author-first1=Alfred Kriss<!-- Patent US3487460A erroneously refers to Alfred Kriss Susskind as Alfred N. Susskind: https://patents.google.com/patent/US3487460A --> |author-last1=Susskind |author-first2=John Erwin |author-last2=Ward<!-- born 1920 --> |date=1958-03-28 |orig-date=1957, 1956 |edition=3 |publisher=[[Technology Press of the Massachusetts Institute of Technology]] / [[John Wiley & Sons, Inc.]] / [[Chapman & Hall, Ltd.]] |publication-place=New York, USA |location=Cambridge, Massachusetts, USA |series=Technology Books in Science and Engineering |volume=1 |pages=3-7–3-8 [3-7], 3-10–3-16 [3-13–3-16], 6-65–6-60 [6-60]}} (x+416+2 pages) (NB. The contents of the book was originally prepared by staff members of the [[MIT Servomechanisms Laboratory|Servomechanisms Laboraratory]], Department of Electrical Engineering, [[Massachusetts Institute of Technology|MIT]], for Special Summer Programs held in 1956 and 1957. The code Susskind actually presented in his work as "reading-type code" is shown as code type&nbsp;II here, whereas the type&nbsp;I code<!-- which is not directly discussed in the book --> is a minor derivation with the two most significant bit columns swapped to better illustrate symmetries.)</ref>

<ref name="MIL_1991">{{cite book |title=Military Handbook: Encoders - Shaft Angle To Digital |publisher=[[United States Department of Defense]] |id=MIL-HDBK-231A |date=1991-09-30 |url=http://everyspec.com/MIL-HDBK/MIL-HDBK-0200-0299/download.php?spec=MIL_HDBK_231A.1809.pdf |access-date=2020-07-25 |url-status=live |archive-url=https://web.archive.org/web/20200725051128/http://everyspec.com/MIL-HDBK/MIL-HDBK-0200-0299/download.php?spec=MIL_HDBK_231A.1809.pdf |archive-date=2020-07-25}} (NB. Supersedes MIL-HDBK-231(AS) (1970-07-01).)</ref>

<ref name="Evans_1961">{{anchor|Ferranti}}{{cite book |title=Digital Data: Their derivation and reduction for analysis and process control |chapter=Chapter Four: Ancillary Equipment: Output-drive and parity-check relays for digitizers |author-first=David Silvester |author-last=Evans<!-- M.I.E.E. --> |edition=1<!-- printed by J. W. Arrowsmith Ltd, Bristol, UK --> |publisher=[[Hilger & Watts Ltd]] / [[Interscience Publishers]] |location=London, UK |date=March 1961 |pages=46–64 [56–57] |url=https://books.google.com/books?id=WOIJAAAAMAAJ |access-date=2020-05-24}} (8+82 pages) (NB. The 4-bit [[#8421|8421]] BCD code with an extra [[parity bit]] applied as [[least significant bit]] to achieve [[odd parity]] of the resulting 5-bit code is also known as ''Ferranti code''.)</ref>

<ref name="Ledley_1960">{{cite book |title=Digital Computer and Control Engineering |chapter=Part 4. Logical Design of Digital-Computer Circuitry; Chapter 15. Serial Arithmetic Operations; Chapter 15-7. Additional Topics |author-first1=Robert Steven |author-last1=Ledley |author-link1=Robert Steven Ledley |author-first2=Louis S. |author-last2=Rotolo |author-first3=James Bruce |author-last3=Wilson |publisher=[[McGraw-Hill Book Company, Inc.]] (printer: The Maple Press Company, York, Pennsylvania, USA) |publication-place=New York, USA |series=McGraw-Hill Electrical and Electronic Engineering Series |edition=1 |date=1960 |sbn=07036981-X |isbn=0-07036981-X |id=. ark:/13960/t72v3b312 |issn=2574-7916 |ol=OL5776493M |lccn=59015055 |oclc=1033638267 |pages=517–518 |url=http://bitsavers.informatik.uni-stuttgart.de/pdf/columbiaUniv/Ledley_Digital_Computer_and_Control_Engineering_1960.pdf |access-date=2021-02-19 |url-status=live |archive-url=https://web.archive.org/web/20210219203314/http://bitsavers.informatik.uni-stuttgart.de/pdf/columbiaUniv/Ledley_Digital_Computer_and_Control_Engineering_1960.pdf |archive-date=2021-02-19 |quote-page=517 |quote=[…] The cyclic code is advantageous mainly in the use of relay circuits, for then a sticky relay will not give a false state as it is delayed in going from one cyclic number to the next. There are many other cyclic codes that have this property. […]}} [https://archive.org/details/digitalcomputerc00ledl] (xxiv+835+1 pages) (NB. Ledley classified the described cyclic code as a ''cyclic decimal-coded binary code''.)</ref>

* {{cite book |url=https://textfiles.meulie.net/bitsaved/Books/Mackenzie_CodedCharSets.pdf |title=Coded Character Sets, History and Development |series=The Systems Programming Series |author-last=Mackenzie |author-first=Charles E. |date=1980 |edition=1 |publisher=[[Addison-Wesley Publishing Company, Inc.]] |isbn=978-0-201-14460-4 |lccn=77-90165 |access-date=2019-08-25 |archive-url=https://web.archive.org/web/20160526172151/https://textfiles.meulie.net/bitsaved/Books/Mackenzie_CodedCharSets.pdf |archive-date=May 26, 2016 |url-status=live |df=mdy-all }}

* <!-- <ref name="Richards_1955"> -->{{cite book |author-first=Richard Kohler |author-last=Richards |title=Arithmetic Operations in Digital Computers |publisher=[[van Nostrand (publisher)|van Nostrand]] |location=New York, USA |date=1955 |pages=397–}}<!-- </ref> -->

* {{cite book |title=Decimal Computation |author-first=Hermann |author-last=Schmid<!-- General Electric Company, Binghamton, New York, USA --> |author-link=Hermann Schmid (computer scientist) |date=1974 |edition=1 |publisher=[[John Wiley & Sons]] |location=Binghamton, New York, USA |isbn=0-471-76180-X |url-access=registration |url=https://archive.org/details/decimalcomputati0000schm}} and {{cite book |title=Decimal Computation |author-first=Hermann |author-last=Schmid<!-- General Electric Company, Binghamton, New York, USA --> |author-link=Hermann Schmid (computer scientist) |orig-date=1974 |date=1983 |edition=1 (reprint) |publisher=Robert E. Krieger Publishing Company |location=Malabar, Florida, USA |isbn=0-89874-318-4}} (NB. At least some batches of the Krieger reprint edition were [[misprint]]s with defective pages 115–146.)

* <!-- <ref name="Massalin_1987_Superoptimizer"> -->{{cite journal |author-first=Henry |author-last=Massalin |title=Superoptimizer: A look at the smallest program |journal=ACM SIGOPS Operating Systems Review |author-link=Henry Massalin |editor-first=Randy |editor-last=Katz |editor-link=Randy Katz |pages=122–126 |doi=10.1145/36204.36194 |date=October 1987 |volume=21 |issue=4 |isbn=0-8186-0805-6 |url=http://www.stanford.edu/class/cs343/resources/superoptimizer.pdf |access-date=2012-04-25 |url-status=live |archive-url=https://web.archive.org/web/20170704123738/https://web.stanford.edu/class/cs343/resources/superoptimizer.pdf |archive-date=2017-07-04}} (Also: ACM SIGPLAN Notices, Vol. 22 #10, IEEE Computer Society Press #87CH2440-6, October 1987)

* {{cite conference |title=VLSI designs for redundant binary-coded decimal addition |author-first1=Behrooz |author-last1=Shirazi |author-first2=David Y. Y. |author-last2=Yun |author-first3=Chang N. |author-last3=Zhang |conference=IEEE Seventh Annual International Phoenix Conference on Computers and Communications, 1988 |pages=52–56 |publisher=[[IEEE]] |date=March 1988}}

* {{cite book |title=Fundamentals of Digital Logic |date=2003 |author-last1=Brown |author-last2=Vranesic}}

* {{cite web |author-first=Mike F. |author-last=Cowlishaw |author-link=Mike F. Cowlishaw |title=Bibliography of material on Decimal Arithmetic – by category |work=General Decimal Arithmetic |orig-date=2002, 2008 |publisher=IBM |date=2009 |url=http://speleotrove.com/decimal/decbibindex.html<!-- http://www2.hursley.ibm.com/decimal/decbibindex.html --> |access-date=2016-01-02}}

* {{cite web |author-first=Mike F. |author-last=Cowlishaw |author-link=Mike F. Cowlishaw |title=A Summary of Chen-Ho Decimal Data encoding |work=General Decimal Arithmetic |orig-date=2000 |publisher=[[IBM]] |date=2014 |url=http://speleotrove.com/decimal/chen-ho.html<!-- http://www2.hursley.ibm.com/decimal/chen-ho.html --> |access-date=2016-01-02}}

* {{cite web |author-first=Mike F. |author-last=Cowlishaw |author-link=Mike F. Cowlishaw |title=A Summary of Densely Packed Decimal encoding |work=General Decimal Arithmetic |orig-date=2000 |publisher=[[IBM]] |date=2007 |url=http://speleotrove.com/decimal/DPDecimal.html<!-- http://www2.hursley.ibm.com/decimal/DPDecimal.html --> |access-date=2016-01-02}}